Under what condition will the steady-state output have zero phase lag relative to the input?

• A. The condition ∠H(jω0) = π.
• B. The condition ∠H(jω0) = 0.
• C. The condition |H(jω0)| = 0.
• D. The condition ω0 = 0.

Answer: (B)

When a sinusoidal input goes into a linear time-invariant system, the steady-state output has the same frequency as the input but is scaled in amplitude and shifted in phase by the transfer function evaluated at that frequency. Zero phase lag means the output is in phase with the input, so there is no delay or advance introduced by the system. This happens exactly when the phase of the transfer function at the input frequency is zero, i.e., ∠H(jω0) = 0 (mod 2π).

So the best condition is that the transfer function’s angle at the input frequency is zero, implying no phase rotation between input and output.

The other options don’t produce zero lag: a π phase shift would invert the signal, not align it in phase; a zero magnitude would make the output vanish regardless of phase; and ω0 = 0 refers to DC, where the idea of a sinusoidal phase lag isn’t applicable in the same sense.